When we used the old 1.5-equiped modem we had the AT interface on the standard RX/TX pins and the Pyton stdout on the AUX RX/TX pins. This allowed for pretty neat monitoring while the system was running.
With our 2.7 modules the Python output seems to end up on the AT interface. Is this configurable in some way? Note, we want both the stdout- and the interpreter’s own output (import, compilation etc) on the AUX port.
Edit: We do not import SER2.
AT#PORTCFG=3 should solve this – there is a doc, Telit HE910 UE910 Family Ports Arrangements explaining in depth. But I am somehow confused, there is no setting to get Python debug on USIF0 (what firmware and PORTCFG is that).
HE has no SER2 implemented.
Your other post regarding the Download Zone has vanished – to answer, from time to time I send download links but don’t rely on this, better ask for DZ access.
PORTCFG does not seem to make a difference neither on the EVK nor on the target 🙁
When we used a stock GL865 module (not sure about the FW version) we got the Python compilation output on AUX and IIRC the default stdout was also on AUX. Don’t quote me on that though. It’s been a while since I used it so we might have used SER2 for debugging. However, I’m 100% sure that the Python interpreter output and exceptions were written on AUX by default.
Alrighty, I still think they should be available for anyone to download 🙂 I’ve asked our supplier (and your admin) for DZ access but so far only gotten these temporary links.
Owait, I had to power cycle the device for the PORTCFG to take effect. Now it seems to be working.
What firmware version are your modules running?
Edit: Yep a reboot is needed after changing PORTCFG.
The one connected to the EVK is at 12.00.603-B036. I’ll check the integrated one ASAP tomorrow.
The internal one is at 12.00.603-B063
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Knowledge Base & Download Zone