In this scenario i must confgure the 2 GSM Modules to work on different timeslots or frame offsets on the DVI and to switch into 3-State in the other remaining timeslots. In this case Both slave 0 and slave 1 could share the DVI Bus (that’s normal with other Telco Chips like BRI/PRI Controllers).
I didn’t find info about changing the Timeslot in the DVI App Note.
Have you any hint? Thank you.
Michael
Let hear what people in R&D department have to say on this, I will come back ASAP.
No is not possible now nor plans to implement such are foreseen. The way to overcome this would be to use a complete DVI bus switch with a FPGA or whatever appropriate.
We want to wire 2 GE865 Modules with their DVI Interfaces Together and connect that to a FPGA, so it would look like:
GE865 (DVI Slave0) <—> GE865 (DVI Slave1) <—-> FPGA (DVI Master)
In this scenario i must confgure the 2 GSM Modules to work on different timeslots or frame offsets on the DVI and to switch into 3-State in the other remaining timeslots. In this case Both slave 0 and slave 1 could share the DVI Bus (that’s normal with other Telco Chips like BRI/PRI Controllers).
I didn’t find info about changing the Timeslot in the DVI App Note.
Have you any hint? Thank you.
Michael
Let hear what people in R&D department have to say on this, I will come back ASAP.
No is not possible now nor plans to implement such are foreseen. The way to overcome this would be to use a complete DVI bus switch with a FPGA or whatever appropriate.
Thank you for replay.
Michael